Invention Grant
US09396796B2 Memory system including nonvolatile memory devices which contain multiple page buffers and control logic therein that support varying read voltage level test operations
有权
存储系统包括包含多页缓冲器和其中的控制逻辑的非易失性存储器件,其支持不同的读电压电平测试操作
- Patent Title: Memory system including nonvolatile memory devices which contain multiple page buffers and control logic therein that support varying read voltage level test operations
- Patent Title (中): 存储系统包括包含多页缓冲器和其中的控制逻辑的非易失性存储器件,其支持不同的读电压电平测试操作
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Application No.: US14525768Application Date: 2014-10-28
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Publication No.: US09396796B2Publication Date: 2016-07-19
- Inventor: Sang Hoon Lee , Hyun Seok Kim , Sung-Hwan Bae , Jong-Nam Baek , Jae Yong Jeong
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel & Sibley, P.A.
- Priority: KR10-2011-0123847 20111124
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C16/04 ; G11C16/06 ; G11C16/26 ; G11C29/00

Abstract:
A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.
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