Fabrication method of semiconductor structure

Invention Grant

US09397190B2 Fabrication method of semiconductor structure 有权

Title translation: 半导体结构的制造方法

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Patent Title: Fabrication method of semiconductor structure
Patent Title (中): 半导体结构的制造方法
Application No.: US14341838

Application Date: 2014-07-27
Publication No.: US09397190B2

Publication Date: 2016-07-19
Inventor: Yen-Liang Wu , Chung-Fu Chang , Yu-Hsiang Hung , Ssu-I Fu , Man-Ling Lu , Chia-Jong Liu , Wen-Jiun Shen , Yi-Wei Chen
Applicant: UNITED MICROELECTRONICS CORP.
Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
Assignee: UNITED MICROELECTRONICS CORP.
Current Assignee: UNITED MICROELECTRONICS CORP.
Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
Agent Winston Hsu; Scott Margo
Priority: TW103120175A 20140611
Main IPC: H01L21/84
IPC: H01L21/84 ; H01L29/66 ; H01L29/78 ; H01L21/265

Fabrication method of semiconductor structure

Abstract:

A fabrication method of a semiconductor structure includes the following steps. First of all, a gate structure is provided on a substrate, and a first material layer is formed on the substrate and the gate structure. Next, boron dopant is implanted to the substrate, at two sides of the gate structure, to form a first doped region, and P type conductive dopant is implanted to the substrate, at the two sides of the gate structure, to form a second doped region. As following, a second material layer is formed on the first material layer. Finally, the second material layer, the first material layer and the substrate at the two sides of the gate structure are etched sequentially, and a recess is formed in the substrate, at the two sides of the gate structure, wherein the recess is positioned within the first doped region.

Abstract(Chinese):

半导体结构的制造方法包括以下步骤。首先，在基板上设置栅极结构，在基板和栅极结构上形成第一材料层。接下来，在栅极结构的两侧将硼掺杂剂注入到衬底中以形成第一掺杂区，并且在栅极结构的两侧将P型导电掺杂剂注入到衬底中，以形成第二掺杂区地区。如下，在第一材料层上形成第二材料层。最后，栅极结构的两侧的第二材料层，第一材料层和衬底被顺序地蚀刻，并且在栅极结构的两侧在衬底中形成凹部，其中凹部位于第一掺杂区域。

Public/Granted literature

US20150364568A1 FABRICATION METHOD OF SEMICONDUCTOR STRUCTURE Public/Granted day:2015-12-17

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/84	.....衬底不是半导体的，例如绝缘体