发明授权
US09400307B2 Test system for improving throughout or maintenance properties of semiconductor testing
有权
用于改善半导体测试的整体或维护性能的测试系统
- 专利标题: Test system for improving throughout or maintenance properties of semiconductor testing
- 专利标题(中): 用于改善半导体测试的整体或维护性能的测试系统
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申请号: US13801694申请日: 2013-03-13
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公开(公告)号: US09400307B2公开(公告)日: 2016-07-26
- 发明人: Hiroshi Tamura , Takuro Nishimura , Tomonobu Hiramatsu
- 申请人: Keysight Technologies, Inc.
- 申请人地址: US CA Santa Rosa
- 专利权人: Keysight Technologies, Inc.
- 当前专利权人: Keysight Technologies, Inc.
- 当前专利权人地址: US CA Santa Rosa
- 主分类号: G01R31/26
- IPC分类号: G01R31/26 ; G01R31/28
摘要:
A semiconductor test system includes test head pins; per-pin resources which are connectable to the test head pins on a one-to-one basis; shared resources, each of which is connectable to one of the test head pins; a tester controller for controlling the per-pin resources and the shared resources; and a tabular-form test plan including: a first column for specifying a measurement function that uses at least one of the per-pin resources and the shared resources; and at least one second column for specifying input and output parameters of the measurement function, the tabular-form test plan further including program rows, the tabular-form test plan being executed by the tester controller, the tabular-form test plan further including a third column for specifying how rows that are executed by asynchronous parallel execution are to be grouped.
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