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US09401361B2 Semiconductor arrangement having first semiconductor device over first shallow well having first conductivity type and second semiconductor device over second shallow well having second conductivity type and formation thereof 有权
具有第一半导体器件的第一半导体器件，具有第一导电类型的第一浅阱，以及具有第二导电类型和其形成的第二浅阱上的第二半导体器件

Semiconductor arrangement having first semiconductor device over first shallow well having first conductivity type and second semiconductor device over second shallow well having second conductivity type and formation thereof
Abstract:
A semiconductor arrangement and method of formation are provided. A semiconductor arrangement includes a first semiconductor device adjacent a second semiconductor device. The first semiconductor device includes a first gate over a first shallow well in a substrate. A first active area is in the first shallow well on a first side of the first gate. The second semiconductor device includes a second gate over a second shallow well. A third active area is in the second shallow well on a first side of the second gate. The second shallow well abuts the first shallow well in the substrate to form a P-N junction. The P-N junction increases capacitance of the semiconductor arrangement, as compared to a device without such a P-N junction.
Abstract(Chinese):

提供了半导体布置和形成方法。 半导体装置包括与第二半导体器件相邻的第一半导体器件。 第一半导体器件包括在衬底中的第一浅阱上的第一栅极。 第一个有效区域位于第一个闸门第一侧的第一个浅井。 第二半导体器件包括位于第二浅阱上的第二栅极。 第三活动区域位于第二闸门第一侧的第二浅井中。 第二浅井与衬底中的第一个浅井邻接以形成P-N结。 与没有这种P-N结的器件相比，P-N结增加了半导体器件的电容。

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