Invention Grant
US09401366B1 Layout pattern for 8T-SRAM and the manufacturing method thereof 有权
8T-SRAM的布局图及其制造方法

Layout pattern for 8T-SRAM and the manufacturing method thereof
Abstract:
The present invention provides a layout pattern of an 8-transistor static random access memory (8T-SRAM), at least including a first diffusion region, a second diffusion region and a third diffusion region disposed on a substrate, a critical dimension region being disposed between the first diffusion region and the third diffusion region. The critical dimension region directly contacts the first diffusion region and the third diffusion region, a first extra diffusion region, a second extra diffusion region and a third extra diffusion region disposed surrounding and directly contacting the first diffusion region, the second diffusion region and the third diffusion region respectively. The first, the second and the third extra diffusion region are not disposed within the critical dimension region.
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