A non-volatile memory device includes a first word line, a second word line, first memory cells, second memory cells, and an address decoder. The second word line is adjacent to the first word line. The first memory cells are connected to the first word line. The second memory cells are connected to the second word line. The second memory cells are connected to the first memory cells, respectively. The address decoder applies a first voltage to the first word line and applies a second voltage to the second word line in an over program period of the first memory cells. The first voltage is higher than a program voltage of the first and second memory cells. The second voltage is lower than a pass voltage of the first and second memory cells.