An Nth stage shift register of a gate driving circuit includes a pull-up unit for pulling up an Nth stage gate signal of a gate line to a high level voltage according to a driving voltage and a first clock signal; an energy-store unit for providing the driving voltage to the pull-up unit; a driving unit for charging the energy-store unit according to a previous stage gate signal; a pull-down unit for pulling down the driving voltage and the Nth stage gate signal to a low level voltage according to a control signal; and a control unit for generating the control signal according to a second clock signal and the driving voltage; wherein the first and the second clock signals have a same pulse width, and a rising edge of the first clock signal leads a rising edge of the second clock signal by ¼ to ½ pulse width.