Invention Grant
US09406642B1 Integrated circuit packaging system with insulated trace and method of manufacture thereof 有权
具有绝缘迹线的集成电路封装系统及其制造方法

Integrated circuit packaging system with insulated trace and method of manufacture thereof
Abstract:
An integrated circuit packaging system and method of manufacture thereof includes: a substrate; a plain trace on the substrate; an insulated trace on the substrate; an insulation layer on the insulated trace, the insulation layer at least partially covers the insulated trace; and a semiconductor device over the substrate, the semiconductor device has a plain bump attached on the plain trace and an inner bump attached on the insulated trace, and the plain bump is mounted adjacent to the insulation layer.
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