Invention Grant
- Patent Title: Integrated circuit packaging system with insulated trace and method of manufacture thereof
- Patent Title (中): 具有绝缘迹线的集成电路封装系统及其制造方法
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Application No.: US14642130Application Date: 2015-03-09
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Publication No.: US09406642B1Publication Date: 2016-08-02
- Inventor: HeeJo Chi , Bartholomew Liao Chung Foh , Sheila Marie L. Alvarez , Zigmund Ramirez Camacho , Dao Nguyen Phu Cuong
- Applicant: HeeJo Chi , Bartholomew Liao Chung Foh , Sheila Marie L. Alvarez , Zigmund Ramirez Camacho , Dao Nguyen Phu Cuong
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Wong & Rees LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/48 ; H01L23/12

Abstract:
An integrated circuit packaging system and method of manufacture thereof includes: a substrate; a plain trace on the substrate; an insulated trace on the substrate; an insulation layer on the insulated trace, the insulation layer at least partially covers the insulated trace; and a semiconductor device over the substrate, the semiconductor device has a plain bump attached on the plain trace and an inner bump attached on the insulated trace, and the plain bump is mounted adjacent to the insulation layer.
Information query
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