Invention Grant
- Patent Title: Stacked multi-chip integrated circuit package
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Application No.: US14598053Application Date: 2015-01-15
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Publication No.: US09406649B2Publication Date: 2016-08-02
- Inventor: Dongming He , Zhongping Bao , Zhenyu Huang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Michelle S. Gallardo
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L25/065 ; H01L23/31

Abstract:
A multi-chip integrated circuit (IC) package is provided which is configured to protect against failure due to warpage. The IC package may comprise a substrate, a level-one IC die and a plurality of level-two IC dies. The level-one IC die having a surface that is electrically coupled to the substrate. The plurality of level-two IC dies is stacked above the level-one IC die. The plurality of level-two IC dies may each have an active surface that is electrically coupled to the substrate. The plurality of level-two IC dies may be arranged side by side such that the active surfaces of the plurality of level-two IC dies are positioned substantially in a same plane. Relative to a single die configuration, the level-two IC dies are separated thereby inhibiting cracking, peeling and/or other potential failures due to warpage of the IC package.
Public/Granted literature
- US20150155265A1 STACKED MULTI-CHIP INTEGRATED CIRCUIT PACKAGE Public/Granted day:2015-06-04
Information query
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