In an example, there is disclosed a digital to analog converter (DAC) architecture that in a first aspect provides first and second parallel paths through the DAC so as to allow a separation of a coarse and fine aspect of the DAC transfer function is described. In another aspect a DAC architecture is provided that comprises at an output of the DAC an interpolator arranged to extend the resolution of the overall DAC architecture by interpolating within the voltage range of the DAC stages that precede the interpolator. Such an interpolator can be used with both an amplifier and/or comparator to provide one or more of a buffering of the output and/or a comparison of the DAC output with signals from other circuit elements. Features of the first and second aspects may be used independently of one another.