发明授权
US09407920B2 Video processor with reduced memory bandwidth and methods for use therewith
有权
具有减少的存储器带宽的视频处理器和与其一起使用的方法
- 专利标题： Video processor with reduced memory bandwidth and methods for use therewith
- 专利标题（中）： 具有减少的存储器带宽的视频处理器和与其一起使用的方法
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申请号： US14133775申请日： 2013-12-19
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公开(公告)号： US09407920B2公开(公告)日： 2016-08-02
- 发明人: Xin Guo , Qi Yang , Edward Hong , Wendy Wai Yin Cheung , Eric Young , Chun-Chin Yeh
- 申请人： ViXS Systems, Inc.
- 申请人地址： CA Toronto
- 专利权人： ViXS Systems, Inc.
- 当前专利权人： ViXS Systems, Inc.
- 当前专利权人地址： CA Toronto
- 代理机构： Garlick & Markison
- 代理商 Bruce E. Stuckman
- 主分类号： G09G5/36
- IPC分类号： G09G5/36 ; H04N19/15 ; H04N19/433 ; H04N19/40 ; H04N19/426 ; H04N19/174 ; H04N19/17 ; H04N19/167
摘要：
A video processing device includes a video processing unit that decodes a video input signal into a decoded video signal in accordance with a video compression protocol, based on uncompressed video frame data. A tile engine includes a tile accumulation module that accumulates the uncompressed video frame data into a plurality of tile units, wherein each of the plurality of tile units includes a plurality of video span units. A tile compression/decompression module generates compressed video frame data for storage in a compressed video frame buffer by compressing the plurality of video span units into a plurality of compressed video span units and further that retrieves the compressed video frame data from the compressed video frame buffer by retrieving the plurality of compressed video span units and generating the uncompressed video frame data by decompressing the plurality of compressed video span units.
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