发明授权
US09425072B2 Mask pattern for hole patterning and method for fabricating semiconductor device using the same
有权
用于孔图案的掩模图案和使用其形成半导体器件的方法
- 专利标题: Mask pattern for hole patterning and method for fabricating semiconductor device using the same
- 专利标题(中): 用于孔图案的掩模图案和使用其形成半导体器件的方法
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申请号: US14334139申请日: 2014-07-17
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公开(公告)号: US09425072B2公开(公告)日: 2016-08-23
- 发明人: Jun-Hyeub Sun , Sung-Kwon Lee , Sang-Oh Lee
- 申请人: SK hynix Inc.
- 申请人地址: KR Gyeonggi-do
- 专利权人: SK Hynix Inc.
- 当前专利权人: SK Hynix Inc.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: IP & T Group LLP
- 优先权: KR10-2012-0064472 20120615
- 主分类号: G03F1/00
- IPC分类号: G03F1/00 ; H01L21/67 ; H01L21/033 ; H01L21/311 ; H01L21/768 ; H01L27/108
摘要:
A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns.
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