Invention Grant
US09431539B2 Dual-strained nanowire and FinFET devices with dielectric isolation
有权
具有绝缘隔离的双应变纳米线和FinFET器件
- Patent Title: Dual-strained nanowire and FinFET devices with dielectric isolation
- Patent Title (中): 具有绝缘隔离的双应变纳米线和FinFET器件
-
Application No.: US14511715Application Date: 2014-10-10
-
Publication No.: US09431539B2Publication Date: 2016-08-30
- Inventor: Yi Qi , Catherine B. Labelle , Xiuyu Cai
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ditthavong & Steiner, P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84 ; H01L29/78 ; H01L27/12 ; H01L29/10 ; H01L29/06 ; H01L29/775 ; H01L29/423 ; H01L21/762 ; H01L29/66

Abstract:
A dual-strained Si and SiGe FinFET device with dielectric isolation and a dual-strained nanowire device and methods of forming them are provided. Embodiments include a SiGe SRB formed on a silicon substrate, the SRB having a first region and a second region; a first and a second dielectric isolation layer formed on the first region and on the second region of the SiGe SRB, respectively; a tensile strained Si fin formed on the first dielectric isolation layer; a compressive strained SiGe fin formed on the second dielectric isolation layer; first source/drain regions formed at opposite sides of the tensile strained Si fin; second source/drain regions formed at opposite sides of the compressive strained SiGe fin; a first RMG formed between the first source/drain regions; and a second RMG formed between the second source/drain regions.
Public/Granted literature
- US20160104799A1 DUAL-STRAINED NANOWIRE AND FINFET DEVICES WITH DIELECTRIC ISOLATION Public/Granted day:2016-04-14
Information query
IPC分类: