Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US14718701Application Date: 2015-05-21
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Publication No.: US09437620B2Publication Date: 2016-09-06
- Inventor: Takuya Tsurume , Yoshitaka Dozen
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JP2005-222199 20050729
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L27/12 ; H01L27/13 ; H01L21/304 ; H01L29/78 ; H01L29/786

Abstract:
It is an object of the present invention to provide a semiconductor device where, even in a case of stacking a plurality of semiconductor elements provided over a substrate, the stacked semiconductor elements can be electrically connected through the substrate, and a manufacturing method thereof. According to one feature of the present invention, a method for manufacturing a semiconductor device includes the steps of selectively forming a depression in an upper surface of a substrate or forming an opening which penetrates the upper surface through a back surface; forming an element group having a transistor so as to cover the upper surface of the substrate and the depression, or the opening; and exposing the element group formed in the depression or the opening by thinning the substrate from the back surface. A means for thinning the substrate can be performed by partially removing the substrate by performing grinding treatment, polishing treatment, etching by chemical treatment, or the like from the back surface of the substrate.
Public/Granted literature
- US20150255489A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2015-09-10
Information query
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