Invention Grant
- Patent Title: System and method for clocking integrated circuit
- Patent Title (中): 时钟集成电路的系统和方法
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Application No.: US14337244Application Date: 2014-07-22
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Publication No.: US09438217B2Publication Date: 2016-09-06
- Inventor: Narayanan Kannan , Rohit Srivastava
- Applicant: Narayanan Kannan , Rohit Srivastava
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee Address: US TX Austin
- Agent Charles E. Bergere
- Main IPC: H03K3/00
- IPC: H03K3/00 ; H03K5/13 ; H03K5/135

Abstract:
A system and method of clocking an integrated circuit (IC) includes determining operating characteristics of the IC. The IC has multiple domains and each domain receives a respective domain clock signal. A skew value is determined for each of the domain clock signals, where each skew value is associated with a respective domain of the IC. The domain clock signals are generated from a reference clock signal and each domain clock signal is skewed from the reference clock according to the respective skew value.
Public/Granted literature
- US20160028385A1 SYSTEM AND METHOD FOR CLOCKING INTEGRATED CIRCUIT Public/Granted day:2016-01-28
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