Invention Grant
- Patent Title: Vertical fin eDRAM
- Patent Title (中): 垂直翅片eDRAM
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Application No.: US14561999Application Date: 2014-12-05
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Publication No.: US09443857B2Publication Date: 2016-09-13
- Inventor: Brent A. Anderson , John E. Barth, Jr. , Edward J. Nowak
- Applicant: GlobalFoundries Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Gibb & Riley, LLC
- Agent Michael J. LeStrange, Esq.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/00 ; H01L31/036 ; H01L31/112 ; H01L27/12 ; H01L21/02 ; H01L21/306 ; H01L21/768

Abstract:
Systems and methods of forming semiconductor devices. A trench capacitor comprising deep trenches is formed in an n+ type substrate. The deep trenches have a lower portion partially filled with a trench conductor surrounded by a storage dielectric. A polysilicon growth is formed in an upper portion of the deep trenches. The semiconductor device includes a single-crystal semiconductor having an angled seam separating a portion of the polysilicon growth from an exposed edge of the deep trenches. A word-line is wrapped around the single-crystal semiconductor. A bit-line overlays the single-crystal semiconductor.
Public/Granted literature
- US20160163712A1 VERTICAL FIN eDRAM Public/Granted day:2016-06-09
Information query
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