Invention Grant
US09449912B1 Integrated circuit (IC) card having an IC module and reduced bond wire stress and method of forming
有权
集成电路(IC)卡具有IC模块和减少的接合线应力和形成方法
- Patent Title: Integrated circuit (IC) card having an IC module and reduced bond wire stress and method of forming
- Patent Title (中): 集成电路(IC)卡具有IC模块和减少的接合线应力和形成方法
-
Application No.: US14736353Application Date: 2015-06-11
-
Publication No.: US09449912B1Publication Date: 2016-09-20
- Inventor: Xueren Zhang , Kim-Yong Goh , Roseanne Duca
- Applicant: STMICROELECTRONICS PTE LTD , STMICROELECTRONICS (MALTA) LTD
- Applicant Address: SG Singapore MT Kirkop
- Assignee: STMICROELECTRONICS PTE LTD,STMICROELECTRONICS (MALTA) LTD
- Current Assignee: STMICROELECTRONICS PTE LTD,STMICROELECTRONICS (MALTA) LTD
- Current Assignee Address: SG Singapore MT Kirkop
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/498 ; H01L23/00

Abstract:
An integrated circuit (IC) module for an IC card includes a plurality of IC card contacts in side-by-side relation. A dielectric support layer is above the contact layer and has a plurality of openings and a first coefficient of thermal expansion (CTE). An IC die is above the dielectric support layer and includes a plurality of bond pads. A bond wire extends from a respective bond pad to a corresponding contact through an adjacent opening in the dielectric support layer. A respective body of fill material is within each opening and has a second CTE. A mold compound body is above the dielectric support layer, the bodies of fill material, and surrounding the IC die. The mold compound body has a third CTE. The first CTE is closer to the second CTE than to the third CTE.
Information query
IPC分类: