Invention Grant
- Patent Title: Integrated circuit package and method of forming the same
- Patent Title (中): 集成电路封装及其形成方法
-
Application No.: US14754230Application Date: 2015-06-29
-
Publication No.: US09455241B2Publication Date: 2016-09-27
- Inventor: Yonggang Jin , Kiyoshi Kuwabara , Xavier Baraton
- Applicant: STMICROELECTRONICS PTE LTD
- Applicant Address: SG Singapore
- Assignee: STMICROELECTRONICS PTE LTD
- Current Assignee: STMICROELECTRONICS PTE LTD
- Current Assignee Address: SG Singapore
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/48 ; H01L21/683 ; H01L23/498 ; H01L23/538 ; H01L21/311 ; H01L21/56 ; H01L21/768

Abstract:
Aspects of the invention are directed towards an integrated circuit package and method of forming the same, and more particularly to a redistributed chip packaging for an integrated circuit. The integrated circuit package includes an integrated circuit having a protective material on at least a portion of the integrated circuit. A lead frame is coupled to the integrated circuit and a conductive layer is also coupled to the interconnect. A solder ball is coupled to the conductive layer and a passivation layer is on the conductive layer. Active and passive components are electrically coupled to the integrated circuit.
Public/Granted literature
- US20150303168A1 INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING THE SAME Public/Granted day:2015-10-22
Information query
IPC分类: