Invention Grant
US09461179B2 Thin film transistor device (TFT) comprising stacked oxide semiconductor layers and having a surrounded channel structure
有权
薄膜晶体管器件(TFT)包括层叠的氧化物半导体层并且具有包围的沟道结构
- Patent Title: Thin film transistor device (TFT) comprising stacked oxide semiconductor layers and having a surrounded channel structure
- Patent Title (中): 薄膜晶体管器件(TFT)包括层叠的氧化物半导体层并且具有包围的沟道结构
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Application No.: US14788940Application Date: 2015-07-01
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Publication No.: US09461179B2Publication Date: 2016-10-04
- Inventor: Yoshiyuki Kobayashi , Shinpei Matsuda , Shunpei Yamazaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2014-143110 20140711
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/36 ; H01L27/06 ; H01L29/04

Abstract:
A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode, and a gate insulating layer. The second oxide semiconductor layer has a portion positioned between the first and third oxide semiconductor layers. The gate insulating layer has a region in contact with a top surface of the third oxide semiconductor layer. The gate electrode overlaps with a top surface of the portion with the gate insulating layer positioned therebetween. The gate electrode faces a side surface of the portion in a channel width direction with the gate insulating layer positioned therebetween. The second oxide semiconductor layer includes a region having a thickness greater than or equal to 2 nm and less than 8 nm. The length in the channel width direction of the second oxide semiconductor layer is less than 60 nm.
Public/Granted literature
- US20160013321A1 SEMICONDUCTOR DEVICE Public/Granted day:2016-01-14
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