Techniques and architecture are disclosed for improving spurious performance in a signal generator/system. The disclosed techniques/architecture can be used, for example, to enhance/improve the wideband and/or narrowband spurious free dynamic range (SFDR) between a given carrier signal and spurious signals. In some example instances, wideband and/or narrowband SFDR may be improved to about −40 dBc or better. In some other example instances, wideband and/or narrowband SFDR may be improved to about −70 dBc or better. The disclosed techniques/architecture can be implemented in a wide variety of signal generators/systems, such as a direct digital synthesizer (DDS)-based system, and over a wide range of input clock frequencies (e.g., in the range of about 10 MHz to 40 GHz, or higher).