A digital signal processor (300), compatible with the Common Public Radio Interface (CPRI), permits reading and writing of IQ data of antenna carriers which have two different sampling rates by using just two single sample rate DMA (Direct Memory Access) modules (306,313). The digital signal processor (300) is capable of processing data of different sampling rates on just one CPRI lane comprising one framer (302). This is achieved by incorporating a divider module (307) and a multiplexer module (314) between the framer (302) and system memory (309, 315). The processor (300) may also be configured so that single sampling rates can also be accommodated.