A host generates an address array including a header and each start address to perform a data processing operation, which may for example be 4 Kbytes of a random read operation or a random write operation, and transmits a generated address array to a data storage device through a data bus. The data storage device, in the case of a random read operation, outputs each data corresponding to the each start address to the host successively by using the address array. In the case of a random write operation, the data storage device receives each data corresponding to each start address from the host and stores it in a memory core.