Invention Grant
US09466554B2 Integrated device comprising via with side barrier layer traversing encapsulation layer
有权
集成装置，其包括通过侧向阻挡层穿过封装层的通孔
- Patent Title: Integrated device comprising via with side barrier layer traversing encapsulation layer
- Patent Title (中): 集成装置，其包括通过侧向阻挡层穿过封装层的通孔
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Application No.: US14274517Application Date: 2014-05-09
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Publication No.: US09466554B2Publication Date: 2016-10-11
- Inventor: Jae Sik Lee , Hong Bok We , Dong Wook Kim , Shiqun Gu
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/48 ; H01L23/50 ; H01L21/56 ; H01L21/768 ; H01L23/498 ; H01L25/10 ; H01L25/065
Abstract:
Some novel features pertain to an integrated device that includes an encapsulation layer, a via structure traversing the encapsulation layer, and a pad. The via structure includes a via that includes a first side, a second side, and a third side. The via structure also includes a barrier layer surrounding at least the first side and the third side of the via. The pad is directly coupled to the barrier layer of the via structure. In some implementations, the integrated device includes a first dielectric layer coupled to a first surface of the encapsulation layer. In some implementations, the integrated device includes a substrate coupled to a first surface of the encapsulation layer. In some implementations, the integrated device includes a first die coupled to the substrate, where the encapsulation layer encapsulates the first die. In some implementations, the via includes a portion configured to operate as a pad.
Public/Granted literature
- US20150228556A1 INTEGRATED DEVICE COMPRISING VIA WITH SIDE BARRIER LAYER TRAVERSING ENCAPSULATION LAYER Public/Granted day:2015-08-13
Information query
IPC分类:
