发明授权
US09495503B2 Method and apparatus to enable a selective push process during manufacturing to improve performance of a selected circuit of an integrated circuit 有权
在制造期间能够进行选择性推送过程以改善集成电路的选定电路的性能的方法和装置

  • 专利标题: Method and apparatus to enable a selective push process during manufacturing to improve performance of a selected circuit of an integrated circuit
  • 专利标题(中): 在制造期间能够进行选择性推送过程以改善集成电路的选定电路的性能的方法和装置
  • 申请号: US13372160
    申请日: 2012-02-13
  • 公开(公告)号: US09495503B2
    公开(公告)日: 2016-11-15
  • 发明人: Jeffrey Herbert FischerManish GargZhongze Wang
  • 申请人: Jeffrey Herbert FischerManish GargZhongze Wang
  • 申请人地址: US CA San Diego
  • 专利权人: QUALCOMM Incorporated
  • 当前专利权人: QUALCOMM Incorporated
  • 当前专利权人地址: US CA San Diego
  • 代理商 Michelle S. Gallardo
  • 主分类号: G06F17/50
  • IPC分类号: G06F17/50
Method and apparatus to enable a selective push process during manufacturing to improve performance of a selected circuit of an integrated circuit
摘要:
Provided are methods and apparatus for enabling selective push processing during design and fabrication of an integrated circuit to improve performance of selected circuits of the integrated circuit. An exemplary method includes identifying a critical portion of an integrated circuit layout that defines a functional element having a critical operating frequency requirement and designing a subcircuit in the critical portion to enable performing a speed push process to increase performance of the subcircuit. The method can also include identifying at least one of a power supply node, a clock supply node, and an interface node at a boundary between the critical portion and a portion of the integrated circuit that is outside of the critical portion. The critical portion can be designed with a power domain that is independent of the portion of the integrated circuit that is outside of the critical portion.
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