发明授权
- 专利标题: Graded buffer epitaxy in aspect ratio trapping
- 专利标题(中): 渐变缓冲外延在纵横比捕获
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申请号: US14974590申请日: 2015-12-18
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公开(公告)号: US09496347B1公开(公告)日: 2016-11-15
- 发明人: Cheng-Wei Cheng , Amlan Majumdar , Kuen-Ting Shiu , Jeng-Bang Yau
- 申请人: International Business Machines Corporation
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 代理机构: Cantor Colburn LLP
- 代理商 Louis Percello
- 主分类号: H01L29/15
- IPC分类号: H01L29/15 ; H01L21/00 ; H01L29/20 ; H01L27/088 ; H01L21/8234
摘要:
A method of forming a semiconductor device includes: providing a patterned structure comprising a silicon substrate and dielectric stacks deposited on the silicon substrate, the dielectric stacks forming trenches exposing a plurality of surface portions of the substrate within the trenches; forming one or more epitaxial buffer layers within the trenches on the exposed surface portions of the substrate; and growing a semiconductor material on the epitaxial buffer layer that is the furthest away from the substrate; wherein each of the one or more epitaxial buffer layers and the semiconductor material has less than about 3% lattice mismatch to the layer immediately beneath the one or more epitaxial buffer layer and the semiconductor material.
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