Semiconductor devices including raised source/drain stressors and methods of manufacturing the same

Invention Grant

US09502413B2 Semiconductor devices including raised source/drain stressors and methods of manufacturing the same 有权

Title translation: 包括升高的源极/漏极应力源的半导体器件及其制造方法

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Patent Title: Semiconductor devices including raised source/drain stressors and methods of manufacturing the same
Patent Title (中): 包括升高的源极/漏极应力源的半导体器件及其制造方法
Application No.: US14828108

Application Date: 2015-08-17
Publication No.: US09502413B2

Publication Date: 2016-11-22
Inventor: Se-Chan Lim , Sang-Pil Sim , Dong-Kyun Sohn , Su-Youn Yi
Applicant: Samsung Electronics Co., Ltd.
Applicant Address: KR
Assignee: Samsung Electronics Co., Ltd.
Current Assignee: Samsung Electronics Co., Ltd.
Current Assignee Address: KR
Agency: Myers Bigel, P.A.
Main IPC: H01L21/8238
IPC: H01L21/8238 ; H01L27/092 ; H01L29/66 ; H01L29/78

Semiconductor devices including raised source/drain stressors and methods of manufacturing the same

Abstract:

A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed on a side of the gate structure. The stressor pattern includes a protruded portion having a top surface higher than a bottom surface of the gate structure and a facet in the protruded portion. The facet is slanted at a predetermined angle with respect to an upper surface of the semiconductor substrate and forms a concave portion with one of the gate spacers. A blocking insulating layer may extend conformally on the stressor pattern and the gate spacers and an insulating wing pattern is disposed in the concave portion on the blocking insulating layer.

Abstract(Chinese):

提供了包括源漏应力源的半导体器件。半导体器件包括在半导体衬底上包括栅极绝缘层和栅电极的栅极结构。栅极间隔物可以设置在栅极结构的侧壁上，并且包括杂质区的应力源图案设置在栅极结构的一侧。应力源图案包括具有高于栅极结构的底表面的顶表面和突出部分中的刻面的突出部分。小面相对于半导体衬底的上表面以预定角度倾斜，并与其中一个栅极间隔物形成凹部。阻挡绝缘层可以在应力器图案上保形地延伸，并且栅极间隔件和绝缘翼图案设置在阻挡绝缘层上的凹部中。

Public/Granted literature

US20150357329A1 SEMICONDUCTOR DEVICES INCLUDING SOURCE/DRAIN STRESSORS AND METHODS OF MANUFACTURING THE SAME Public/Granted day:2015-12-10

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS