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US09552308B2 Early wake-warn for clock gating control 有权
提前唤醒时钟门控控制

Early wake-warn for clock gating control
Abstract:
A request associated with a particular cache record is generated to be sent to a system component associated with a cache bank over an interconnect. A wake-warn signal is sent over a dedicated wake-warn channel to indicate to the system component that the request is to arrive. Wake-warn signals cause a disabled clock to be ungated to an enabled state. The request is then sent to the system component.
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