Invention Grant
US09553696B2 Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same
有权
具有长度为64800，码率为3/15和正交相移键控的低密度奇偶校验码字的位交织器，以及使用相同的比特交织方法
- Patent Title: Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same
- Patent Title (中): 具有长度为64800，码率为3/15和正交相移键控的低密度奇偶校验码字的位交织器，以及使用相同的比特交织方法
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Application No.: US14606958Application Date: 2015-01-27
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Publication No.: US09553696B2Publication Date: 2017-01-24
- Inventor: Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
- Applicant: Electronics and Telecommunications Research Institute
- Applicant Address: KR Daejeon
- Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Current Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Current Assignee Address: KR Daejeon
- Priority: KR10-2015-0009381 20150120
- Main IPC: G06F11/00
- IPC: G06F11/00 ; H03M13/00 ; H04L1/00 ; H03M13/11 ; H03M13/25 ; H03M13/27
Abstract:
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
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