Arithmetic memories, image sensors including the arithmetic memories and methods of operating the arithmetic memories are provided. The arithmetic memories may include an input block to which a digital pixel reset signal and a digital pixel image signal are input and a plurality of unit cells configured to generate a digital difference signal. The input block may include first and second multiplexers to which the digital pixel reset signal and the digital pixel image signal are input and an inverter connected to the first multiplexer. The plurality of unit cells may include a first unit cell connected to the input block and a second unit cell through an N-th unit cell successively connected to the first unit cell. N may be two or greater. The first unit cell may include third and fourth multiplexers, a first flip/flop, and a first AND gate.