An integrated circuit comprises a first signal transfer block comprising first through (M)-th aligning blocks that are cascade-coupled to produce first aligned control signals through (M)-th aligned control signals, respectively, by aligning first control signals with a clock signal, wherein M is an integer greater than one, and a functional block divided into first through (M)-th sub-functional blocks configured to perform a same function in parallel, each of the first through (M)-th sub-functional blocks operating according to corresponding ones of the first aligned control signals through (M)-th aligned control signals generated by the first through (M)-th aligning blocks.