Invention Grant
US09564518B2 Method and apparatus for source-drain junction formation in a FinFET with in-situ doping
有权
在具有原位掺杂的FinFET中源 - 漏结形成的方法和装置
- Patent Title: Method and apparatus for source-drain junction formation in a FinFET with in-situ doping
- Patent Title (中): 在具有原位掺杂的FinFET中源 - 漏结形成的方法和装置
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Application No.: US14495562Application Date: 2014-09-24
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Publication No.: US09564518B2Publication Date: 2017-02-07
- Inventor: Vladimir Machkaoutsan , Jeffrey Junhao Xu , Stanley Seungchul Song , Mustafa Badaroglu , Choh Fei Yeap
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/78 ; H01L29/165 ; H01L29/10
Abstract:
A portion of a bulk silicon (Si) is formed into a fin, having a fin base and, on the fin base, an in-process fin. The fin base is doped Si and the in-process fin is silicon germanium (SiGe). The in-process SiGe fin has a source region and a drain region. Boron is in-situ doped into the drain region and into the source region. Optionally, boron is in-situ doped by forming an epi-layer, having boron, on the drain region and on the source region, and drive-in annealing to diffuse boron in the source region and the drain region.
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