Invention Grant
US09570411B2 Pad structure of a semiconductor device, method of manufacturing the pad structure and semiconductor package including the pad structure
有权
半导体器件的衬垫结构,衬垫结构的制造方法以及包括焊盘结构的半导体封装
- Patent Title: Pad structure of a semiconductor device, method of manufacturing the pad structure and semiconductor package including the pad structure
- Patent Title (中): 半导体器件的衬垫结构,衬垫结构的制造方法以及包括焊盘结构的半导体封装
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Application No.: US14920927Application Date: 2015-10-23
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Publication No.: US09570411B2Publication Date: 2017-02-14
- Inventor: Nam-Gyu Baek , Young-Min Lee , Yun-Rae Cho , Sun-Dae Kim
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2012-40832 20120419
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L21/768
Abstract:
A pad structure usable with a semiconductor device may include an insulating layer pattern structure, a plug, and a pad. The insulating layer pattern structure has a plug hole and at least one via hole. The plug is formed in the plug hole. The pad is formed on the insulating layer pattern structure. The pad is electrically connected with the plug and has a lower surface and an uneven upper surface. The lower surface includes a protruded portion inserted into the via hole. The uneven upper surface includes a recessed portion and an elevated portion—to provide high roughness and firm connection.
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