Invention Grant
- Patent Title: Error correction in a memory device
- Patent Title (中): 存储器件中的错误校正
-
Application No.: US14692092Application Date: 2015-04-21
-
Publication No.: US09575835B2Publication Date: 2017-02-21
- Inventor: Thomas Vogelsang , Suresh N. Rajan , Ian P. Shaeffer , Frederick A. Ware , Wayne F. Ellis
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Hamilton, Brook, Smith & Reynolds, P.C.
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/44

Abstract:
A dynamic random access memory (DRAM) array is configured for selective repair and error correction of a subset of the array. Error-correcting code (ECC) is provided to a selected subset of the array to protect a row or partial row of memory cells where one or more weak memory cells are detected. By adding a sense amplifier stripe to the edge of the memory array, the adjacent edge segment of the array is employed to store ECC information associated with the protected subsets of the array. Bit replacement is also applied to defective memory cells. By implementing ECC selectively rather than to the entire array, integrity of the memory array is maintained at minimal cost to the array in terms of area and energy consumption.
Public/Granted literature
- US20150234707A1 Error Correction In A Memory Device Public/Granted day:2015-08-20
Information query