Invention Grant
- Patent Title: Apparatus and method for improved lock elision techniques
- Patent Title (中): 用于改进锁定检测技术的装置和方法
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Application No.: US14024451Application Date: 2013-09-11
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Publication No.: US09588801B2Publication Date: 2017-03-07
- Inventor: Irina Calciu , Justin E Gottschlich , Tatiana Shpeisman , Gilles A Pokam
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/46 ; G06F12/14 ; G06F9/52

Abstract:
An apparatus and method for improving the efficiency with which speculative critical sections are executed within a transactional memory architecture. For example, a method in accordance with one embodiment comprises: waiting to execute a speculative critical section of program code until a lock is freed by a current transaction; responsively executing the speculative critical section to completion upon detecting that the lock has been freed, regardless of whether the lock is held by another transaction during the execution of the speculative critical section; once execution of the speculative critical section is complete, determining whether the lock is taken; and if the lock is not taken, then committing the speculative critical section and, if the lock is taken, then aborting the speculative critical section.
Public/Granted literature
- US20150074366A1 APPARATUS AND METHOD FOR IMPROVED LOCK ELISION TECHNIQUES Public/Granted day:2015-03-12
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