Invention Grant
- Patent Title: Cascaded bit sequences in display systems
- Patent Title (中): 显示系统中的级联位序列
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Application No.: US14446374Application Date: 2014-07-30
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Publication No.: US09591188B2Publication Date: 2017-03-07
- Inventor: Bradley William Walker
- Applicant: Brass Roots Technologies, LLC
- Applicant Address: US TX Plano
- Assignee: BASS ROOTS TECHNOLOGIES, LLC
- Current Assignee: BASS ROOTS TECHNOLOGIES, LLC
- Current Assignee Address: US TX Plano
- Agency: Jackson Walker LLP
- Main IPC: G06F3/14
- IPC: G06F3/14 ; H04N5/04 ; H04N5/21 ; G09G3/00 ; G09G3/20 ; G09G3/34

Abstract:
The present disclosure pertains to a method for designing cascaded bit sequences for cascaded digital displays. The method avoids unwanted interactions between cascaded sequences in cascaded digital displays. By using sequences with a particular structure, cascaded sequences can be designed such that no sequence is affected by the others. The following rules must be followed in constructing the sequence. First, the display devices must be frame-locked, so that the timing relationship between the sequences is maintained throughout each frame. Second, for each display device, the ratio of bit plane weights must remain constant, regardless of the pixel data displayed on the other display device(s). Third, the amount of bit plane skew must remain constant, regardless of the pixel data displayed on the other display device(s). Fourth, bit plane phased leakage must be compensated for or avoided.
Public/Granted literature
- US20150036049A1 CASCADED BIT SEQUENCES IN DISPLAY SYSTEMS Public/Granted day:2015-02-05
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