Invention Grant
- Patent Title: Semiconductor package with trace covered by solder resist
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Application No.: US14825443Application Date: 2015-08-13
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Publication No.: US09640505B2Publication Date: 2017-05-02
- Inventor: Tzu-Hung Lin , Ching-Liou Huang , Thomas Matthew Gregorich
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L23/498 ; H01L23/50
Abstract:
The invention provides a semiconductor package. The semiconductor package includes a substrate. A first conductive trace is disposed on the substrate. A first conductive trace disposed on the substrate. A semiconductor die is disposed over the first conductive trace. A solder resist layer is formed such a portion of the solder resist layer and a portion of the first conductive trace collectively have a T-shaped cross section.
Public/Granted literature
- US20150348932A1 SEMICONDUCTOR PACKAGE Public/Granted day:2015-12-03
Information query
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