- Patent Title: Circuit arrangement and method for processing a digital video stream and for detecting a fault in a digital video stream, digital video system and computer readable program product
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Application No.: US14224167Application Date: 2014-03-25
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Publication No.: US09641809B2Publication Date: 2017-05-02
- Inventor: Michael Andreas Staudenmaier , Victor-Hugo Osornio Lopez , Dirk Wendel
- Applicant: Michael Andreas Staudenmaier , Victor-Hugo Osornio Lopez , Dirk Wendel
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H04N19/65
- IPC: H04N19/65 ; H04N7/18 ; H04N19/89

Abstract:
The present invention relates to a circuit arrangement for processing a digital video stream, the circuit arrangement comprising: an input interface for receiving a digital video stream, a processing circuit which is arranged to process the digital video stream, a hang-up detecting circuit for detecting a fault in the processed digital video stream, the hang-up detecting circuit comprising: a checksum generating circuit which is arranged to generate checksums for the frames of the processed digital video stream, a memory for storing generated checksums and an analyzing device arranged to compare a currently generated checksum to a plurality of corresponding checksums of preceding frames stored in the memory and to generate an error signal if at least one predefined amount of compared checksums are matching. The present invention also relates to a digital video system, a method for processing a digital video stream and a computer readable program product.
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