Invention Grant
- Patent Title: Drain extended field effect transistors and methods of formation thereof
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Application No.: US14743796Application Date: 2015-06-18
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Publication No.: US09647069B2Publication Date: 2017-05-09
- Inventor: Mayank Shrivastava , Cornelius Christian Russ , Harald Gossner , Ramgopal Rao
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/10 ; H01L29/78 ; H01L21/265 ; H01L29/45 ; H01L27/088 ; H01L29/06 ; H01L29/08 ; H01L29/165 ; H01L29/267 ; H01L29/417

Abstract:
In an embodiment of the invention, a semiconductor device includes a first region having a first doping type, a channel region having the first doping type disposed in the first region, and a retrograde well having a second doping type. The second doping type is opposite to the first doping type. The retrograde well has a shallower layer with a first peak doping and a deeper layer with a second peak doping higher than the first peak doping. The device further includes a drain region having the second doping type over the retrograde well. An extended drain region is disposed in the retrograde well, and couples the channel region with the drain region. An isolation region is disposed between a gate overlap region of the extended drain region and the drain region. A length of the drain region is greater than a depth of the isolation region.
Public/Granted literature
- US20150340442A1 Drain Extended Field Effect Transistors and Methods of Formation Thereof Public/Granted day:2015-11-26
Information query
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