Invention Grant
- Patent Title: Method for making semiconductor device with filled gate line end recesses
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Application No.: US14281021Application Date: 2014-05-19
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Publication No.: US09653579B2Publication Date: 2017-05-16
- Inventor: Qing Liu , Ruilong Xie , Xiuyu Cai , Chun-chen Yeh , Kejia Wang
- Applicant: STMICROELECTRONICS, INC. , GLOBALFOUNDRIES Inc , INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US TX Coppell KY Grand Cayman US NY Armonk
- Assignee: STMicroelectronics, Inc.,GLOBALFOUNDRIES Inc,International Business Machines Corporation
- Current Assignee: STMicroelectronics, Inc.,GLOBALFOUNDRIES Inc,International Business Machines Corporation
- Current Assignee Address: US TX Coppell KY Grand Cayman US NY Armonk
- Agency: Seed IP Law Group LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L21/8234 ; H01L27/088 ; H01L29/417

Abstract:
A method for making a semiconductor device may include forming first and second spaced apart semiconductor active regions with an insulating region therebetween, forming at least one sacrificial gate line extending between the first and second spaced apart semiconductor active regions and over the insulating region, and forming sidewall spacers on opposing sides of the at least one sacrificial gate line. The method may further include removing portions of the at least one sacrificial gate line within the sidewall spacers and above the insulating region defining at least one gate line end recess, filling the at least one gate line end recess with a dielectric material, and forming respective replacement gates in place of portions of the at least one sacrificial gate line above the first and second spaced apart semiconductor active regions.
Public/Granted literature
- US20150333155A1 METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH FILLED GATE LINE END RECESSES Public/Granted day:2015-11-19
Information query
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