Invention Grant
- Patent Title: Method and circuit for parasitic capacitance cancellation for self capacitance sensing
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Application No.: US13853887Application Date: 2013-03-29
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Publication No.: US09665215B2Publication Date: 2017-05-30
- Inventor: Sze-Kwang Tan , Yannick Guedon
- Applicant: STMicroelectronics Asia Pacific Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: STMicroelectronics Asia Pacific Pte Ltd
- Current Assignee: STMicroelectronics Asia Pacific Pte Ltd
- Current Assignee Address: SG Singapore
- Agency: Gardere Wynne Sewell LLP
- Main IPC: G06F3/041
- IPC: G06F3/041 ; G06F3/044

Abstract:
Apparatus and methods to measure capacitance changes for a touch-sensitive capacitive matrix are described. Charge-removal circuits and measurement techniques may be employed to cancel deleterious effects of parasitic capacitances in the touch-sensitive capacitive matrix. Capacitively switching a supply during timed charge removal may be used to cancel unwanted effects due to clock jitter. The apparatus and methods can improve signal-to-noise characteristics, sensitivity, and/or dynamic range for capacitive measurements relating to touch-sensitive capacitive devices.
Public/Granted literature
- US20140292705A1 METHOD & CIRCUIT FOR PARASITIC CAPACITANCE CANCELLATION FOR SELF CAPACITANCE SENSING Public/Granted day:2014-10-02
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