Invention Grant
- Patent Title: Leakage current-based delay circuit
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Application No.: US14863935Application Date: 2015-09-24
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Publication No.: US09667241B2Publication Date: 2017-05-30
- Inventor: Jaesup Lee , Tae-Young Chung , Bum-Man Kim , Dae-Chul Jeong
- Applicant: Samsung Electronics Co., Ltd. , Postech Academy-Industry Foundation
- Applicant Address: KR Suwon-si KR Pohang-si
- Assignee: Samsung Electronics Co., Ltd.,Poshtech Academy-Industry Foundation
- Current Assignee: Samsung Electronics Co., Ltd.,Poshtech Academy-Industry Foundation
- Current Assignee Address: KR Suwon-si KR Pohang-si
- Agency: NSIP Law
- Priority: KR10-2015-0023254 20150216
- Main IPC: H03K5/131
- IPC: H03K5/131 ; H03K17/284 ; H03K17/292 ; H03K5/00

Abstract:
A leakage current-based delay circuit is provided, wherein the delay circuit may include a first transistor circuit and a second transistor circuit, each transistor circuit may include a p-type transistor, an n-type transistor, an n-node between a drain node of the p-type transistor and a gate node of the n-type transistor, and a p-node between a gate node of the p-type transistor and a drain node of the n-type transistor. The p-node of the second transistor circuit may be charged based on a power source voltage through the first transistor circuit during a first time interval of an input signal, and the n-node of the second transistor circuit may be discharged based on a ground voltage through the first transistor circuit during the first time interval.
Public/Granted literature
- US20160241229A1 LEAKAGE CURRENT-BASED DELAY CIRCUIT Public/Granted day:2016-08-18
Information query
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