Invention Grant
- Patent Title: Semiconductor module with low inductance load connections
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Application No.: US14709605Application Date: 2015-05-12
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Publication No.: US09668350B2Publication Date: 2017-05-30
- Inventor: Andre Arens
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102014107271 20140523
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H01L25/07 ; H01L23/538 ; H01L23/495 ; H01L23/498

Abstract:
A semiconductor module includes a printed circuit board, and first and second embedded semiconductor chips. The first and second semiconductor chips each have a first load connection and a second load connection. The printed circuit board further includes a structured first metalization layer, which has a first section and a second section, and a structured second metalization layer, which has a first section, a second section and a third section. The first section of the second metalization layer and the second section of the first metalization layer have comb shaped structures having first and second protrusions. These first and second sections are electrically conductively connected to one another by a number of first plated-through holes each of which is permanently electrically conductively connected both at first protrusions to the first section of the second metalization layer and at second protrusions to the second section of the first metalization layer.
Public/Granted literature
- US20150342055A1 SEMICONDUCTOR MODULE WITH LOW INDUCTANCE LOAD CONNECTIONS Public/Granted day:2015-11-26
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