Methods of making semiconductor device packages may involve providing a fan out wafer including semiconductor-device-package locations. Each semiconductor-device-package location may include at least two mutually spaced semiconductor dice and a dielectric material laterally surrounding each of the dice and extending between adjacent semiconductor-device-package locations. Electrically conductive traces may extend over active surfaces of the dice and laterally beyond peripheries of the dice over the dielectric material to locations of electrically conductive vias extending from the electrically conductive traces through the dielectric molding material. Semiconductor dice may be stacked on a side of at least some semiconductor-device-package locations of the fan out wafer opposite the electrically conductive traces. The stacks of semiconductor dice may be electrically connected to electrically conductive vias of the at least some semiconductor-device-package locations. The semiconductor-device-package locations having stacks of semiconductor dice thereon may be singulated from the fan out wafer.