Invention Grant
- Patent Title: Semiconductor device and method of confining conductive bump material with solder mask patch
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Application No.: US14144906Application Date: 2013-12-31
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Publication No.: US09679811B2Publication Date: 2017-06-13
- Inventor: Rajendra D. Pendse
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/768 ; H01L21/56 ; H01L23/31 ; H01L23/498 ; H05K3/34 ; H01L23/00

Abstract:
A semiconductor device has a semiconductor die having a plurality of die bump pad and substrate having a plurality of conductive trace with an interconnect site. A solder mask patch is formed interstitially between the die bump pads or interconnect sites. A conductive bump material is deposited on the interconnect sites or die bump pads. The semiconductor die is mounted to the substrate so that the conductive bump material is disposed between the die bump pads and interconnect sites. The conductive bump material is reflowed without a solder mask around the die bump pad or interconnect site to form an interconnect structure between the semiconductor die and substrate. The solder mask patch confines the conductive bump material within the die bump pad or interconnect site. The interconnect structure can include a fusible portion and non-fusible portion. An encapsulant is deposited between the semiconductor die and substrate.
Public/Granted literature
- US20140113446A1 Semiconductor Device and Method of Confining Conductive Bump Material with Solder Mask Patch Public/Granted day:2014-04-24
Information query
IPC分类: