- Patent Title: Semiconductor device and method including an intertial mass element
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Application No.: US15266809Application Date: 2016-09-15
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Publication No.: US09679857B2Publication Date: 2017-06-13
- Inventor: Matthias Merz , Youri Victorovitch Ponomarev , Mark van Dal
- Applicant: Matthias Merz , Youri Victorovitch Ponomarev , Mark van Dal
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP09165533 20090715
- Main IPC: H01L23/52
- IPC: H01L23/52 ; B81C1/00 ; B81B7/02 ; G01P15/06 ; H01L23/00 ; B81C99/00 ; B81B7/00 ; H01L21/768 ; H01L23/522 ; H01L23/525 ; H01L23/528 ; G01P15/08

Abstract:
Disclosed is a semiconductor device comprising a stack of patterned metal layers separated by dielectric layers, the stack comprising a first conductive support structure and a second conductive support structure and a cavity in which an inertial mass element comprising at least one metal portion is conductively coupled to the first support structure and the second support structure by respective conductive connection portions, at least one of said conductive connection portions being designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by the dimensions of the conductive connection portions. A method of manufacturing such a semiconductor device is also disclosed.
Public/Granted literature
- US20170005045A1 SEMICONDUCTOR DEVICE AND METHOD Public/Granted day:2017-01-05
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