Invention Grant
- Patent Title: Adaptive equalization circuit, digital coherent receiver, and adaptive equalization method
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Application No.: US15203004Application Date: 2016-07-06
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Publication No.: US09680667B2Publication Date: 2017-06-13
- Inventor: Daisuke Sasaki , Kazuhiko Hatae , Tomoki Katou , Nobukazu Koizumi , Masato Oota , Yasuo Ohtomo , Manabu Yamazaki , Masashi Sato
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2015-137587 20150709
- Main IPC: H04L25/03
- IPC: H04L25/03 ; H04B10/61 ; H04L25/02

Abstract:
A circuit includes a calculation circuit configured to calculate a noise power of a predetermined-training-sequence pattern repeatedly included in a first signal input into an adaptive equalizer, based on a second signal obtained by compensating the first signal by a compensation circuit, a channel-estimation value based on the second signal, and the predetermined-training-sequence pattern; and an average circuit configured to obtain an average value of estimation values of frequency offsets based on the predetermined-training-sequence pattern having the noise power equal to or smaller than a predetermined power, among estimation values of frequency offsets based on the predetermined-training-sequence pattern, wherein the compensation circuit is configured to compensate a frequency offset of the predetermined-training sequence pattern based on the average value and thereby obtain the second signal, and the adaptive equalizer is configured to perform adaptive-equalization processing of the first signal with a setting value based on the second signal.
Public/Granted literature
- US20170012803A1 ADAPTIVE EQUALIZATION CIRCUIT, DIGITAL COHERENT RECEIVER, AND ADAPTIVE EQUALIZATION METHOD Public/Granted day:2017-01-12
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