- 专利标题: Memory access control device, cache memory and semiconductor device
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申请号: US14931724申请日: 2015-11-03
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公开(公告)号: US09684602B2公开(公告)日: 2017-06-20
- 发明人: Seiji Maeda
- 申请人: Kabushiki Kaisha Toshiba
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Knobbe, Martens, Olson & Bear, LLP
- 主分类号: G06F12/08
- IPC分类号: G06F12/08 ; G06F12/0875
摘要:
A memory access control device of an embodiment includes a data memory configured to record information of an access request relating to reading and writing of data to a main memory, and a controller configured to receive notification of the access request and select an access destination with reference to recording content of the data memory. When history of a request for write access and history of a request for read access to an address designated by the access request are recorded in the data memory, the controller selects a cache memory as the access destination, and otherwise, selects the main memory as the access destination.
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