Invention Grant
- Patent Title: Transistor, method for manufacturing transistor, semiconductor device, and electronic device
-
Application No.: US15057364Application Date: 2016-03-01
-
Publication No.: US09685560B2Publication Date: 2017-06-20
- Inventor: Shunpei Yamazaki , Yoshitaka Yamamoto
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2015-040597 20150302; JP2015-056030 20150319
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/786 ; H01L29/66 ; H01L29/24 ; H01L21/02 ; H01L29/06 ; H01L21/477
Abstract:
A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.
Public/Granted literature
- US20160260835A1 TRANSISTOR, METHOD FOR MANUFACTURING TRANSISTOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE Public/Granted day:2016-09-08
Information query
IPC分类:
