- 专利标题: Rate matching with multiple code block sizes
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申请号: US12137431申请日: 2008-06-11
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公开(公告)号: US09686044B2公开(公告)日: 2017-06-20
- 发明人: Durga Prasad Malladi
- 申请人: Durga Prasad Malladi
- 申请人地址: US CA San Diego
- 专利权人: QUALCOMM Incorporated
- 当前专利权人: QUALCOMM Incorporated
- 当前专利权人地址: US CA San Diego
- 代理商 Changwoo Yang
- 主分类号: H04L27/00
- IPC分类号: H04L27/00 ; H04L1/00 ; H03M13/29 ; H03M13/00
摘要:
Bits included in each code block of a transport block can be stored to an associated circular buffer and transmitted over a channel. Each circular buffer can vary in size in proportion to a size of the associated code block. Therefore, since in certain operating environments code blocks for a transport block can vary in size, circular buffers can vary in size as well. Accordingly, when not all data from a transport block and/or an array of circular buffers can be transmitted over the channel, each circular buffer from the array can transmit a portion of bits that is proportional to a size of the respective circular buffer (or the associated code block or encoded code block). Furthermore, the number of bits transmitted from each circular buffer can be constrained by an aggregate budget for all circular buffers and can be further constrained to be an integer multiple of a modulation order for the transport block.
公开/授权文献
- US20090041110A1 RATE MATCHING WITH MULTIPLE CODE BLOCK SIZES 公开/授权日:2009-02-12
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