Invention Grant
- Patent Title: Semiconductor structure with integrated passive structures
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Application No.: US14864091Application Date: 2015-09-24
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Publication No.: US09698159B2Publication Date: 2017-07-04
- Inventor: Anthony I. Chou , Arvind Kumar , Renee T. Mo , Shreesh Narasimha
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Roberts Mlotkowski Safran Cole & Calderon P.C.
- Agent Steven Meyers; Andrew M. Calderon
- Main IPC: H01L27/11
- IPC: H01L27/11 ; H01L27/12 ; H01L23/522 ; H01L21/762 ; H01L49/02 ; H01L27/06 ; H01L21/02 ; H01L21/265 ; H01L21/3213 ; H01L29/06 ; H01L29/49 ; H01L29/51 ; H01L21/28 ; H01L21/3065 ; H01L21/3105 ; H01L21/311 ; H01L21/3205 ; H01L21/84 ; H01L23/525 ; H01L29/423 ; H01L21/306 ; H01L21/308 ; H01L21/8234 ; H01L27/08 ; H01L21/763 ; H01L29/16 ; H01L29/161 ; H01L29/24

Abstract:
A metal-oxide-semiconductor field-effect transistor (MOSFET) with integrated passive structures and methods of manufacturing the same is disclosed. The method includes forming a stacked structure in an active region and at least one shallow trench isolation (STI) structure adjacent to the stacked structure. The method further includes forming a semiconductor layer directly in contact with the at least one STI structure and the stacked structure. The method further includes patterning the semiconductor layer and the stacked structure to form an active device in the active region and a passive structure of the semiconductor layer directly on the at least one STI structure.
Public/Granted literature
- US20160013181A1 SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE STRUCTURES Public/Granted day:2016-01-14
Information query
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